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SSBM Decomp
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#include "targimpl.h"#include "dolphin_trk.h"#include "dserror.h"#include "flush_cache.h"#include "m7xx_m603e_reg.h"#include "main_TRK.h"#include "memmap.h"#include "msgbuf.h"#include "msgcmd.h"#include "notify.h"#include "nubevent.h"#include "nubinit.h"#include "ppc_except.h"#include "ppc_reg.h"#include "ppc_targimpl.h"#include "support.h"Data Structures | |
| struct | TRKExceptionStatus |
| struct | TRKStepStatus |
Macros | |
| #define | BOOTINFO 0x80000000 |
| #define | MEM2_CACHED 0x90000000 |
| #define | DB_EXCEPTION_MASK 0x44 |
| #define | INSTR_NOP 0x60000000 |
| Instruction macros. | |
| #define | INSTR_BLR 0x4E800020 |
| #define | INSTR_PSQ_ST(psr, offset, rDest, w, gqr) |
| #define | INSTR_PSQ_L(psr, offset, rSrc, w, gqr) |
| #define | INSTR_STW(rSrc, offset, rDest) |
| #define | INSTR_LWZ(rDest, offset, rSrc) |
| #define | INSTR_STFD(fprSrc, offset, rDest) |
| #define | INSTR_LFD(fprDest, offset, rSrc) |
| #define | INSTR_MFSPR(rDest, spr) |
| #define | INSTR_MTSPR(spr, rSrc) |
| #define | ALTIVEC_VECTOR_REG_ACCESS_MIN 0 |
| #define | ALTIVEC_VECTOR_REG_ACCESS_MAX 31 |
| #define | ALTIVEC_VSCR_ACCESS 32 |
| #define | ALTIVEC_VRSAVE_SPR_ACCESS 33 |
| #define | SUPPORT_TRAP 0x0FE00000 |
| #define | CURRENT_CONTEXT_ADDR 0xD4 |
| #define | FPU_CONTEXT_ADDR 0xD8 |
| #define | ROOT_THREAD_ADDR 0xDC |
| #define | PREVIOUS_THREAD_ADDR 0xE0 |
| #define | CURRENT_THREAD_ADDR 0xE4 |
| #define | FP_FPSCR_ACCESS 32 |
| #define | FP_FPECR_ACCESS 33 |
Typedefs | |
| typedef void(* | RegAccessFunc) (void *srcDestPtr, u128 val) |
Variables | |
| OSThreadQueue | __OSActiveThreadQueue |
| OSThread * | __OSCurrentThread |
| ProcessorState_PPC | gTRKCPUState |
| ProcessorRestoreFlags_PPC | gTRKRestoreFlags = { false, false } |
| TRKState_PPC | gTRKState |
| static TRKExceptionStatus | gTRKExceptionStatus = { { 0, 0, 0 }, true, false } |
| static TRKStepStatus | gTRKStepStatus = { 0, kDSStepIntoCount, 0, 0, 0 } |
| u128 | TRKvalue128_temp |
| static u16 | TRK_saved_exceptionID = 0 |
| Default_PPC | gTRKSaveState |
| #define BOOTINFO 0x80000000 |
| #define MEM2_CACHED 0x90000000 |
| #define DB_EXCEPTION_MASK 0x44 |
| #define INSTR_NOP 0x60000000 |
Instruction macros.
| #define INSTR_BLR 0x4E800020 |
| #define INSTR_PSQ_ST | ( | psr, | |
| offset, | |||
| rDest, | |||
| w, | |||
| gqr ) |
| #define INSTR_PSQ_L | ( | psr, | |
| offset, | |||
| rSrc, | |||
| w, | |||
| gqr ) |
| #define INSTR_STW | ( | rSrc, | |
| offset, | |||
| rDest ) |
| #define INSTR_LWZ | ( | rDest, | |
| offset, | |||
| rSrc ) |
| #define INSTR_STFD | ( | fprSrc, | |
| offset, | |||
| rDest ) |
| #define INSTR_LFD | ( | fprDest, | |
| offset, | |||
| rSrc ) |
| #define INSTR_MFSPR | ( | rDest, | |
| spr ) |
| #define INSTR_MTSPR | ( | spr, | |
| rSrc ) |
| #define ALTIVEC_VECTOR_REG_ACCESS_MIN 0 |
| #define ALTIVEC_VECTOR_REG_ACCESS_MAX 31 |
| #define ALTIVEC_VSCR_ACCESS 32 |
| #define ALTIVEC_VRSAVE_SPR_ACCESS 33 |
| #define SUPPORT_TRAP 0x0FE00000 |
| #define CURRENT_CONTEXT_ADDR 0xD4 |
| #define FPU_CONTEXT_ADDR 0xD8 |
| #define ROOT_THREAD_ADDR 0xDC |
| #define PREVIOUS_THREAD_ADDR 0xE0 |
| #define CURRENT_THREAD_ADDR 0xE4 |
| #define FP_FPSCR_ACCESS 32 |
| #define FP_FPECR_ACCESS 33 |
| typedef void(* RegAccessFunc) (void *srcDestPtr, u128 val) |
|
static |
| DSError TRKTargetAccessMemory | ( | void * | data, |
| u32 | start, | ||
| size_t * | length, | ||
| MemoryAccessOptions | accessOptions, | ||
| bool | read ) |
| DSError TRKTargetAccessDefault | ( | u32 | firstRegister, |
| u32 | lastRegister, | ||
| MessageBuffer * | b, | ||
| size_t * | registersLengthPtr, | ||
| bool | read ) |
| DSError TRKTargetAccessFP | ( | u32 | firstRegister, |
| u32 | lastRegister, | ||
| MessageBuffer * | b, | ||
| size_t * | registerStorageSize, | ||
| s32 | read ) |
| DSError TRKTargetAccessExtended1 | ( | u32 | firstRegister, |
| u32 | lastRegister, | ||
| MessageBuffer * | b, | ||
| size_t * | registerStorageSize, | ||
| s32 | read ) |
| DSError TRKTargetAccessExtended2 | ( | u32 | firstRegister, |
| u32 | lastRegister, | ||
| MessageBuffer * | b, | ||
| size_t * | registersLengthPtr, | ||
| bool | read ) |
| DSError TRKTargetVersions | ( | DSVersions * | version | ) |
| DSError TRKTargetSupportMask | ( | DSSupportMask * | mask | ) |
| void TRKPostInterruptEvent | ( | void | ) |
| ASM void TRKSwapAndGo | ( | void | ) |
| ASM void TRKInterruptHandlerEnableInterrupts | ( | void | ) |
| DSError TRKTargetAddStopInfo | ( | MessageBuffer * | arg0 | ) |
| void TRKTargetAddExceptionInfo | ( | MessageBuffer * | b | ) |
| bool TRKTargetStepDone | ( | void | ) |
| DSError TRKTargetDoStep | ( | void | ) |
| u32 TRKTargetGetPC | ( | void | ) |
| DSError TRKTargetSupportRequest | ( | void | ) |
| bool TRKTargetStopped | ( | void | ) |
| void TRKTargetSetStopped | ( | bool | val | ) |
| DSError TRKTargetStop | ( | void | ) |
| void TRKTargetSetInputPendingPtr | ( | void * | ptr | ) |
| OSThreadQueue __OSActiveThreadQueue |
| OSThread* __OSCurrentThread |
| ProcessorState_PPC gTRKCPUState |
| ProcessorRestoreFlags_PPC gTRKRestoreFlags = { false, false } |
| TRKState_PPC gTRKState |
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static |
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static |
| u128 TRKvalue128_temp |
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static |
| Default_PPC gTRKSaveState |